ROM:02000A00 ; --------------------------------------------------------------------------- ROM:02000A00 ROM:02000A00 loc_2000A00 ; CODE XREF: ROM:loc_2000A00 ROM:02000A00 B loc_2000A00 ROM:02000A00 ; --------------------------------------------------------------------------- ROM:02000A04 DCB 0xFE ; þ ROM:02000A05 DCB 0xFF ROM:02000A06 DCB 0xFF ROM:02000A07 DCB 0xEA ; ê ROM:02000A08 DCB 0xFE ; þ ROM:02000A09 DCB 0xFF ROM:02000A0A DCB 0xFF ROM:02000A0B DCB 0xEA ; ê ROM:02000A0C DCB 0xFE ; þ ROM:02000A0D DCB 0xFF ROM:02000A0E DCB 0xFF ROM:02000A0F DCB 0xEA ; ê ROM:02000A10 DCB 0xFE ; þ ROM:02000A11 DCB 0xFF ROM:02000A12 DCB 0xFF ROM:02000A13 DCB 0xEA ; ê ROM:02000A14 DCB 0xFE ; þ ROM:02000A15 DCB 0xFF ROM:02000A16 DCB 0xFF ROM:02000A17 DCB 0xEA ; ê ROM:02000A18 DCB 0xFE ; þ ROM:02000A19 DCB 0xFF ROM:02000A1A DCB 0xFF ROM:02000A1B DCB 0xEA ; ê ROM:02000A1C DCB 0xFE ; þ ROM:02000A1D DCB 0xFF ROM:02000A1E DCB 0xFF ROM:02000A1F DCB 0xEA ; ê ROM:02000A20 DCB 0xFE ; þ ROM:02000A21 DCB 0xFF ROM:02000A22 DCB 0xFF ROM:02000A23 DCB 0xEA ; ê ROM:02000A24 DCB 0xFE ; þ ROM:02000A25 DCB 0xFF ROM:02000A26 DCB 0xFF ROM:02000A27 DCB 0xEA ; ê ROM:02000A28 DCB 0xFE ; þ ROM:02000A29 DCB 0xFF ROM:02000A2A DCB 0xFF ROM:02000A2B DCB 0xEA ; ê ROM:02000A2C DCB 0xFE ; þ ROM:02000A2D DCB 0xFF ROM:02000A2E DCB 0xFF ROM:02000A2F DCB 0xEA ; ê ROM:02000A30 DCB 0xFE ; þ ROM:02000A31 DCB 0xFF ROM:02000A32 DCB 0xFF ROM:02000A33 DCB 0xEA ; ê ROM:02000A34 DCB 0xFE ; þ ROM:02000A35 DCB 0xFF ROM:02000A36 DCB 0xFF ROM:02000A37 DCB 0xEA ; ê ROM:02000A38 DCB 0xFE ; þ ROM:02000A39 DCB 0xFF ROM:02000A3A DCB 0xFF ROM:02000A3B DCB 0xEA ; ê ROM:02000A3C DCB 0xFE ; þ ROM:02000A3D DCB 0xFF ROM:02000A3E DCB 0xFF ROM:02000A3F DCB 0xEA ; ê ROM:02000A40 DCB 0xFE ; þ ROM:02000A41 DCB 0xFF ROM:02000A42 DCB 0xFF ROM:02000A43 DCB 0xEA ; ê ROM:02000A44 DCB 0xFE ; þ ROM:02000A45 DCB 0xFF ROM:02000A46 DCB 0xFF ROM:02000A47 DCB 0xEA ; ê ROM:02000A48 DCB 0xFE ; þ ROM:02000A49 DCB 0xFF ROM:02000A4A DCB 0xFF ROM:02000A4B DCB 0xEA ; ê ROM:02000A4C DCB 0xFE ; þ ROM:02000A4D DCB 0xFF ROM:02000A4E DCB 0xFF ROM:02000A4F DCB 0xEA ; ê ROM:02000A50 DCB 0xFE ; þ ROM:02000A51 DCB 0xFF ROM:02000A52 DCB 0xFF ROM:02000A53 DCB 0xEA ; ê ROM:02000A54 DCB 0xFE ; þ ROM:02000A55 DCB 0xFF ROM:02000A56 DCB 0xFF ROM:02000A57 DCB 0xEA ; ê ROM:02000A58 DCB 0xFE ; þ ROM:02000A59 DCB 0xFF ROM:02000A5A DCB 0xFF ROM:02000A5B DCB 0xEA ; ê ROM:02000A5C DCB 0xFE ; þ ROM:02000A5D DCB 0xFF ROM:02000A5E DCB 0xFF ROM:02000A5F DCB 0xEA ; ê ROM:02000A60 DCB 0xFE ; þ ROM:02000A61 DCB 0xFF ROM:02000A62 DCB 0xFF ROM:02000A63 DCB 0xEA ; ê ROM:02000A64 DCB 0xFE ; þ ROM:02000A65 DCB 0xFF ROM:02000A66 DCB 0xFF ROM:02000A67 DCB 0xEA ; ê ROM:02000A68 DCB 0xFE ; þ ROM:02000A69 DCB 0xFF ROM:02000A6A DCB 0xFF ROM:02000A6B DCB 0xEA ; ê ROM:02000A6C DCB 0xFE ; þ ROM:02000A6D DCB 0xFF ROM:02000A6E DCB 0xFF ROM:02000A6F DCB 0xEA ; ê ROM:02000A70 DCB 0xFE ; þ ROM:02000A71 DCB 0xFF ROM:02000A72 DCB 0xFF ROM:02000A73 DCB 0xEA ; ê ROM:02000A74 DCB 0xFE ; þ ROM:02000A75 DCB 0xFF ROM:02000A76 DCB 0xFF ROM:02000A77 DCB 0xEA ; ê ROM:02000A78 DCB 0xFE ; þ ROM:02000A79 DCB 0xFF ROM:02000A7A DCB 0xFF ROM:02000A7B DCB 0xEA ; ê ROM:02000A7C DCB 0xFE ; þ ROM:02000A7D DCB 0xFF ROM:02000A7E DCB 0xFF ROM:02000A7F DCB 0xEA ; ê ROM:02000A80 DCB 0xFE ; þ ROM:02000A81 DCB 0xFF ROM:02000A82 DCB 0xFF ROM:02000A83 DCB 0xEA ; ê ROM:02000A84 DCB 0xFE ; þ ROM:02000A85 DCB 0xFF ROM:02000A86 DCB 0xFF ROM:02000A87 DCB 0xEA ; ê ROM:02000A88 DCB 0xFE ; þ ROM:02000A89 DCB 0xFF ROM:02000A8A DCB 0xFF ROM:02000A8B DCB 0xEA ; ê ROM:02000A8C DCB 0xFE ; þ ROM:02000A8D DCB 0xFF ROM:02000A8E DCB 0xFF ROM:02000A8F DCB 0xEA ; ê ROM:02000A90 DCB 0xFE ; þ ROM:02000A91 DCB 0xFF ROM:02000A92 DCB 0xFF ROM:02000A93 DCB 0xEA ; ê ROM:02000A94 DCB 0xFE ; þ ROM:02000A95 DCB 0xFF ROM:02000A96 DCB 0xFF ROM:02000A97 DCB 0xEA ; ê ROM:02000A98 DCB 0xFE ; þ ROM:02000A99 DCB 0xFF ROM:02000A9A DCB 0xFF ROM:02000A9B DCB 0xEA ; ê ROM:02000A9C DCB 0xFE ; þ ROM:02000A9D DCB 0xFF ROM:02000A9E DCB 0xFF ROM:02000A9F DCB 0xEA ; ê ROM:02000AA0 DCB 0xFE ; þ ROM:02000AA1 DCB 0xFF ROM:02000AA2 DCB 0xFF ROM:02000AA3 DCB 0xEA ; ê ROM:02000AA4 DCB 0xFE ; þ ROM:02000AA5 DCB 0xFF ROM:02000AA6 DCB 0xFF ROM:02000AA7 DCB 0xEA ; ê ROM:02000AA8 DCB 0xFE ; þ ROM:02000AA9 DCB 0xFF ROM:02000AAA DCB 0xFF ROM:02000AAB DCB 0xEA ; ê ROM:02000AAC DCB 0xFE ; þ ROM:02000AAD DCB 0xFF ROM:02000AAE DCB 0xFF ROM:02000AAF DCB 0xEA ; ê ROM:02000AB0 DCB 0xFE ; þ ROM:02000AB1 DCB 0xFF ROM:02000AB2 DCB 0xFF ROM:02000AB3 DCB 0xEA ; ê ROM:02000AB4 DCB 0xFE ; þ ROM:02000AB5 DCB 0xFF ROM:02000AB6 DCB 0xFF ROM:02000AB7 DCB 0xEA ; ê ROM:02000AB8 DCB 0xFE ; þ ROM:02000AB9 DCB 0xFF ROM:02000ABA DCB 0xFF ROM:02000ABB DCB 0xEA ; ê ROM:02000ABC DCB 0xFE ; þ ROM:02000ABD DCB 0xFF ROM:02000ABE DCB 0xFF ROM:02000ABF DCB 0xEA ; ê ROM:02000AC0 DCB 0xFE ; þ ROM:02000AC1 DCB 0xFF ROM:02000AC2 DCB 0xFF ROM:02000AC3 DCB 0xEA ; ê ROM:02000AC4 DCB 0xFE ; þ ROM:02000AC5 DCB 0xFF ROM:02000AC6 DCB 0xFF ROM:02000AC7 DCB 0xEA ; ê ROM:02000AC8 DCB 0xFE ; þ ROM:02000AC9 DCB 0xFF ROM:02000ACA DCB 0xFF ROM:02000ACB DCB 0xEA ; ê ROM:02000ACC DCB 0xFE ; þ ROM:02000ACD DCB 0xFF ROM:02000ACE DCB 0xFF ROM:02000ACF DCB 0xEA ; ê ROM:02000AD0 DCB 0xFE ; þ ROM:02000AD1 DCB 0xFF ROM:02000AD2 DCB 0xFF ROM:02000AD3 DCB 0xEA ; ê ROM:02000AD4 DCB 0xFE ; þ ROM:02000AD5 DCB 0xFF ROM:02000AD6 DCB 0xFF ROM:02000AD7 DCB 0xEA ; ê ROM:02000AD8 DCB 0xFE ; þ ROM:02000AD9 DCB 0xFF ROM:02000ADA DCB 0xFF ROM:02000ADB DCB 0xEA ; ê ROM:02000ADC DCB 0xFE ; þ ROM:02000ADD DCB 0xFF ROM:02000ADE DCB 0xFF ROM:02000ADF DCB 0xEA ; ê ROM:02000AE0 DCB 0xFE ; þ ROM:02000AE1 DCB 0xFF ROM:02000AE2 DCB 0xFF ROM:02000AE3 DCB 0xEA ; ê ROM:02000AE4 ; --------------------------------------------------------------------------- ROM:02000AE4 ROM:02000AE4 loc_2000AE4 ; CODE XREF: ROM:loc_2000AE4j ROM:02000AE4 B loc_2000AE4 ROM:02000AE8 ; --------------------------------------------------------------------------- ROM:02000AE8 B first_sub ROM:02000AEC ROM:02000AEC ; =============== S U B R O U T I N E ======================================= ROM:02000AEC ROM:02000AEC ROM:02000AEC cp15_something ; CODE XREF: read_data+2Cp ROM:02000AEC ; read_data+130p ROM:02000AEC MOV R12, #0 ROM:02000AF0 ADD R1, R1, R0 ROM:02000AF4 BIC R0, R0, #0x1F ROM:02000AF8 ROM:02000AF8 loc_2000AF8 ; CODE XREF: cp15_something+1Cj ROM:02000AF8 MCR p15, 0, R12,c7,c10, 4 ROM:02000AFC MCR p15, 0, R0,c7,c14, 1 ROM:02000B00 ADD R0, R0, #0x20 ROM:02000B04 CMP R0, R1 ROM:02000B08 BLT loc_2000AF8 ROM:02000B0C BX LR ROM:02000B0C ; End of function cp15_something ROM:02000B0C ROM:02000B10 ROM:02000B10 ; =============== S U B R O U T I N E ======================================= ROM:02000B10 ROM:02000B10 ; read_data(dst, src, size); ROM:02000B10 ROM:02000B10 read_data ; CODE XREF: ROM:02000D78p ROM:02000B10 ; ROM:02000D90p ... ROM:02000B10 ROM:02000B10 var_30 = -0x30 ROM:02000B10 var_2C = -0x2C ROM:02000B10 var_28 = -0x28 ROM:02000B10 var_24 = -0x24 ROM:02000B10 ROM:02000B10 STMFD SP!, {R4-R9,R11,LR} ROM:02000B14 LDR R3, =0x27FFE60 ROM:02000B18 SUB SP, SP, #0x10 ROM:02000B1C STR R2, [SP,#0x30+var_30] ; push size; ROM:02000B20 LDR R2, [R3] ; R2 = CART_PORT_SETTING1; ROM:02000B24 MOV R5, R1 ; R5 = src; ROM:02000B28 BIC R2, R2, #0x7000000 ; R2 &= ~(SIZE_1 | SIZE_2 | SIZE_3); ROM:02000B2C ORR R2, R2, #0xA1000000 ; R2 |= BLOCK_SIZE_x200; ROM:02000B30 LDR R1, [SP,#0x30+var_30] ; load size; ROM:02000B34 STR R2, [SP,#0x30+var_24] ; push cart_port_setting1; ROM:02000B38 STR R0, [SP,#0x30+var_2C] ; push ram_dest_addr; ROM:02000B3C BL cp15_something ROM:02000B40 LDR R2, [SP,#0x30+var_30] ; r2 = size; ROM:02000B44 ADD R3, R2, #0x1FC ; r3 = size + 0x1fc; ROM:02000B48 ADD R3, R3, #3 ; r3 = size+3; ROM:02000B4C MOVS R3, R3,LSR#9 ; r3 >>= 9; ROM:02000B50 STR R3, [SP,#0x30+var_28] ; push (size + 0x1ff)>>9; ROM:02000B54 BEQ exit_read_data ; if ((size + 0x1ff)>>9 == 0) return; ROM:02000B58 MOV R11, #0 ROM:02000B5C LDR R8, =0x40001A4 ROM:02000B60 LDR R6, [SP,#0x30+var_2C] ; r6 = ram_dest_addr; ROM:02000B64 MOV R9, R11 ROM:02000B68 ROM:02000B68 block_copy_loop ; CODE XREF: read_data+11Cj ROM:02000B68 LDR R3, =0x40001A1 ROM:02000B6C MOVL R2, 0xFFFFFFC0 ROM:02000B70 STRB R2, [R3] ROM:02000B74 MOV LR, R6 ROM:02000B78 ROM:02000B78 loc_2000B78 ; CODE XREF: read_data+70j ROM:02000B78 LDR R3, [R8] ROM:02000B7C CMP R3, #0 ROM:02000B80 BLT loc_2000B78 ROM:02000B84 LDR R3, =0x40001A9 ROM:02000B88 LDR R2, =0x40001AA ROM:02000B8C MOV R1, R5,LSR#24 ROM:02000B90 STRB R1, [R3] ; CART_CMD[1] = (rom_src >> 24); ROM:02000B94 MOV R0, R5,LSR#16 ROM:02000B98 ADD R3, R3, #2 ROM:02000B9C MOV R12, R5,LSR#8 ROM:02000BA0 STRB R0, [R2] ; CART_CMD[2] = (rom_src >> 16); ROM:02000BA4 STRB R12, [R3] ; CART_CMD[3] = (rom_src >> 8); ROM:02000BA8 MOVL R2, 0xFFFFFFB7 ROM:02000BAC SUB R3, R3, #3 ROM:02000BB0 STRB R2, [R3] ; CART_CMD[0] = 0xB7; ROM:02000BB4 LDR R2, =0x40001AD ROM:02000BB8 ADD R3, R3, #4 ROM:02000BBC STRB R5, [R3] ; CART_CMD[4] = (rom_src & 0xff); ROM:02000BC0 STRB R9, [R2] ; CART_CMD[5] = 0; ROM:02000BC4 ADD R3, R3, #2 ROM:02000BC8 ADD R2, R2, #2 ROM:02000BCC STRB R9, [R3] ; CART_CMD[6] = 0; ROM:02000BD0 STRB R9, [R2] ; CART_CMD[7] = 0; ROM:02000BD4 MOVL R3, 0xFFFFFFC0 ROM:02000BD8 SUB R2, R2, #0xE ROM:02000BDC STRB R3, [R2] ; CART_CR1_H = CART_IRQ | CART_ENABLE; // kick off cmd ROM:02000BE0 LDR R2, [SP,#0x30+var_24] ROM:02000BE4 LDR R4, =0x40001A4 ROM:02000BE8 LDR R7, =0x4100010 ROM:02000BEC STR R2, [R8] ROM:02000BF0 ROM:02000BF0 load_data_loop ; CODE XREF: read_data+104j ROM:02000BF0 LDR R3, [R4] ROM:02000BF4 TST R3, #0x800000 ROM:02000BF8 BEQ loc_2000C0C ; if (ROM_CTRL & READY) skip; ROM:02000BFC CMP LR, #0 ROM:02000C00 LDRNE R3, [R7] ROM:02000C04 LDREQ R3, [R7] ROM:02000C08 STRNE R3, [LR],#4 ; *ram_dst_addr++ = CARD_DATA_IN; ROM:02000C0C ROM:02000C0C loc_2000C0C ; CODE XREF: read_data+E8j ROM:02000C0C LDR R3, [R4] ROM:02000C10 CMP R3, #0 ROM:02000C14 BLT load_data_loop ROM:02000C18 LDR R3, [SP,#0x30+var_28] ; r3 = (rom_addr>>9); ROM:02000C1C ADD R11, R11, #1 ; r11++; ROM:02000C20 CMP R3, R11 ROM:02000C24 ADD R5, R5, #0x200 ; src += 0x200; ROM:02000C28 ADD R6, R6, #0x200 ; dst += 0x200; ROM:02000C2C BNE block_copy_loop ROM:02000C30 ROM:02000C30 exit_read_data ; CODE XREF: read_data+44j ROM:02000C30 LDR R0, [SP,#0x30+var_2C] ROM:02000C34 LDR R1, [SP,#0x30+var_30] ROM:02000C38 ADD SP, SP, #0x10 ROM:02000C3C LDMFD SP!, {R4-R9,R11,LR} ROM:02000C40 B cp15_something ROM:02000C40 ; End of function read_data ROM:02000C40 ROM:02000C40 ; --------------------------------------------------------------------------- ROM:02000C44 dword_2000C44 DCD 0x27FFE60 ; DATA XREF: read_data+4r ROM:02000C48 dword_2000C48 DCD 0x40001A4 ; DATA XREF: read_data+4Cr ROM:02000C48 ; read_data+D4r ROM:02000C4C dword_2000C4C DCD 0x40001A1 ; DATA XREF: read_data:block_copy_loopr ROM:02000C50 dword_2000C50 DCD 0x40001A9 ; DATA XREF: read_data+74r ROM:02000C54 dword_2000C54 DCD 0x40001AA ; DATA XREF: read_data+78r ROM:02000C58 dword_2000C58 DCD 0x40001AD ; DATA XREF: read_data+A4r ROM:02000C5C dword_2000C5C DCD 0x4100010 ; DATA XREF: read_data+D8r ROM:02000C60 ROM:02000C60 ; =============== S U B R O U T I N E ======================================= ROM:02000C60 ROM:02000C60 ; r0 = cmd[0] ROM:02000C60 ROM:02000C60 do_cart_cmd ; CODE XREF: do_unlock_cmd+4j ROM:02000C60 STMFD SP!, {R4-R7,LR} ROM:02000C64 LDR R3, =0x27FFE60 ROM:02000C68 MOVL R1, 0xFFFFFFC0 ROM:02000C6C LDR R2, [R3] ; R2 = cardHeader[CART_PORT_SETTING1]; ROM:02000C70 LDR R3, =0x40001A1 ROM:02000C74 BIC R2, R2, #0x7000000 ROM:02000C78 LDR R6, =0x40001A4 ROM:02000C7C STRB R1, [R3] ROM:02000C80 MOV R5, R0 ROM:02000C84 ORR R7, R2, #0xA0000000 ROM:02000C88 ROM:02000C88 loc_2000C88 ; CODE XREF: do_cart_cmd+30j ROM:02000C88 LDR R3, [R6] ; while(ROMCTRL == 0); ROM:02000C8C CMP R3, #0 ROM:02000C90 BLT loc_2000C88 ; while(ROMCTRL == 0); ROM:02000C94 LDR R3, =0x40001A1 ROM:02000C98 LDR R2, =0x40001A8 ROM:02000C9C MOVL R1, 0xFFFFFFC0 ROM:02000CA0 STRB R1, [R3] ; CART_CR1_H = CART_IRQ | NDS_SLOT_ENABLE; ROM:02000CA4 MOV R12, R5,LSR#24 ROM:02000CA8 ADD R3, R3, #8 ROM:02000CAC MOV LR, R5,LSR#16 ROM:02000CB0 STRB R12, [R2] ; CART_CMD[0] = (r0 >> 24); ROM:02000CB4 MOV R4, R5,LSR#8 ROM:02000CB8 STRB LR, [R3] ; CART_CMD[1] = (r0 >> 16); ROM:02000CBC ADD R2, R2, #2 ROM:02000CC0 ADD R3, R3, #2 ROM:02000CC4 STRB R4, [R2] ; CART_CMD[2] = (r0 >> 8); ROM:02000CC8 MOV R0, #0 ROM:02000CCC STRB R5, [R3] ; CART_CMD[3] = (r0 >> 0); ROM:02000CD0 ADD R2, R2, #5 ROM:02000CD4 ADD R3, R3, #1 ROM:02000CD8 STRB R0, [R2] ; CART_CMD[7] = 0; ROM:02000CDC STR R7, [R6] ; ROMCTRL = TRANSFER_START | ROM_RESB; // ?? ROM:02000CE0 SUB R2, R2, #2 ROM:02000CE4 STRB R0, [R3],#2 ; CART_CMD[4] = 0; R3 += 2; ROM:02000CE8 STRB R0, [R2] ; CART_CMD[7] = 0; ROM:02000CEC STRB R0, [R3] ; CART_CMD[6] = 0; ROM:02000CF0 LDMFD SP!, {R4-R7,LR} ; restore r4-r7, LR ROM:02000CF4 BX LR ROM:02000CF4 ; End of function do_cart_cmd ROM:02000CF4 ROM:02000CF4 ; --------------------------------------------------------------------------- ROM:02000CF8 dword_2000CF8 DCD 0x27FFE60 ; DATA XREF: do_cart_cmd+4r ROM:02000CFC dword_2000CFC DCD 0x40001A1 ; DATA XREF: do_cart_cmd+10r ROM:02000CFC ; do_cart_cmd+34r ROM:02000D00 dword_2000D00 DCD 0x40001A4 ; DATA XREF: do_cart_cmd+18r ROM:02000D04 dword_2000D04 DCD 0x40001A8 ; DATA XREF: do_cart_cmd+38r ROM:02000D08 ROM:02000D08 ; =============== S U B R O U T I N E ======================================= ROM:02000D08 ROM:02000D08 ROM:02000D08 do_unlock_cmd ; CODE XREF: ROM:02000D68p ROM:02000D08 LDR R0, =0xF0050000 ROM:02000D0C B do_cart_cmd ; cart_cmd(0xF0050000); ROM:02000D0C ; End of function do_unlock_cmd ROM:02000D0C ROM:02000D0C ; --------------------------------------------------------------------------- ROM:02000D10 dword_2000D10 DCD 0xF0050000 ; DATA XREF: do_unlock_cmdr ROM:02000D14 ; --------------------------------------------------------------------------- ROM:02000D14 ROM:02000D14 loc_2000D14 ; CODE XREF: ROM:loc_2000D14j ROM:02000D14 B loc_2000D14 ROM:02000D18 ; --------------------------------------------------------------------------- ROM:02000D18 BX R0 ROM:02000D1C ; --------------------------------------------------------------------------- ROM:02000D1C BX LR ROM:02000D20 ; --------------------------------------------------------------------------- ROM:02000D20 ROM:02000D20 first_sub ; CODE XREF: ROM:02000AE8j ROM:02000D20 LDR R1, =0xFFFFE080 ROM:02000D24 LDR R3, =0x4000204 ROM:02000D28 STMFD SP!, {R4,LR} ; preserve r4 / lr ROM:02000D2C STRH R1, [R3] ; REG_EXMEMCNT = (MEM_SYNCHRONOUS | PRIORITY_ARM7 | GBA_SLOT_ARM7); ROM:02000D30 LDR R3, =0x5000400 ROM:02000D34 MOVL R0, 0xFFFF7FFF ROM:02000D38 MOV R2, #0x5000000 ROM:02000D3C STRH R0, [R2] ; BG_PALETTE = WHITE; ROM:02000D40 STRH R0, [R3] ; BG_PALETTE[255] = WHITE; ROM:02000D44 LDR R2, =0x400006C ROM:02000D48 LDR R3, =0x400106C ROM:02000D4C MOV R4, #0 ROM:02000D50 STRH R4, [R2] ; BRIGHTNESS = 0 ROM:02000D54 STRH R4, [R3] ; BRIGHTNESS_SUB = 0 ROM:02000D58 LDR R3, =0x4000214 ROM:02000D5C ADD R2, R2, #0x1A4 ROM:02000D60 STR R4, [R2] ; REG_IE = 0; ROM:02000D64 STR R4, [R3] ; REG_IF = 0; ROM:02000D68 BL do_unlock_cmd ROM:02000D6C MOV R1, R4 ROM:02000D70 LDR R0, =0x27FFE00 ROM:02000D74 MOV R2, #0x200 ROM:02000D78 BL read_data ; read_data(header, 0x00, 0x200); ROM:02000D7C LDR R3, =0x27FFE28 ROM:02000D80 LDR R2, =0x27FFE20 ROM:02000D84 LDR R0, [R3],#4 ROM:02000D88 LDR R1, [R2] ROM:02000D8C LDR R2, [R3] ROM:02000D90 BL read_data ; read_data(header[ARM9_RAM_OFFSET], header[ARM9_ROM_OFFSET], header[ARM9_SIZE]); ROM:02000D94 LDR R3, =0x27FFE38 ROM:02000D98 LDR R2, =0x27FFE30 ROM:02000D9C LDR R0, [R3],#4 ROM:02000DA0 LDR R1, [R2] ROM:02000DA4 LDR R2, [R3] ROM:02000DA8 BL read_data ; read_data(header[ARM7_RAM_OFFSET], header[ARM7_ROM_OFFSET], header[ARM7_SIZE]); ROM:02000DAC LDR R2, =0x4000C ROM:02000DB0 LDR R3, =0x4000188 ROM:02000DB4 LDR R1, =0x4000184 ROM:02000DB8 STR R2, [R3] ; IPC_FIFO_SEND = 0x400C; // ARM7_IPC_RESET ROM:02000DBC MOV R0, #0x4100000 ROM:02000DC0 ROM:02000DC0 wait_ipc ; CODE XREF: ROM:02000DC8j ROM:02000DC0 ; ROM:02000DD4j ROM:02000DC0 LDRH R3, [R1] ROM:02000DC4 TST R3, #0x100 ; while(!(IPC_FIFO_CR & FIFO_EMPTY)); ROM:02000DC8 BNE wait_ipc ROM:02000DCC LDR R3, [R0] ROM:02000DD0 CMP R3, R2 ; while(!(IPC_FIFO_RECV & ARM7_IPC_RESET)); ROM:02000DD4 BNE wait_ipc ROM:02000DD8 LDR R2, =0x4000180 ROM:02000DDC ROM:02000DDC wait_sync ; CODE XREF: ROM:02000DF0j ROM:02000DDC LDRH R3, [R2] ROM:02000DE0 MOV R3, R3,LSL#16 ROM:02000DE4 MOV R3, R3,LSR#16 ROM:02000DE8 AND R3, R3, #0xFF ROM:02000DEC CMP R3, #1 ROM:02000DF0 BNE wait_sync ; WHILE((IPC_SYNC&0xff) != 1); ROM:02000DF4 MOV R3, #0x100 ROM:02000DF8 LDR R1, =0x4000180 ROM:02000DFC STRH R3, [R2] ; IPC_SYNC = 0x100; // write x01 ROM:02000E00 ROM:02000E00 wait_sync2 ; CODE XREF: ROM:02000E14j ROM:02000E00 LDRH R3, [R1] ROM:02000E04 MOV R3, R3,LSL#16 ROM:02000E08 MOV R3, R3,LSR#16 ROM:02000E0C AND R3, R3, #0xFF ROM:02000E10 CMP R3, #1 ; WHILE((IPC_SYNC&0xff) != 1); ROM:02000E14 BNE wait_sync2 ROM:02000E18 MOV R3, #0 ROM:02000E1C STRH R3, [R1] ; IPC_SYNC = 0x00; // write x00 ROM:02000E20 SVC 0 ; swiSoftReset(); ROM:02000E24 LDMFD SP!, {R4,LR} ; restore r4, lr ROM:02000E28 BX LR ; return; // this should never happen, I guess? ROM:02000E28 ; --------------------------------------------------------------------------- ROM:02000E2C dword_2000E2C DCD 0xFFFFE080 ; DATA XREF: ROM:first_subr ROM:02000E30 dword_2000E30 DCD 0x4000204 ; DATA XREF: ROM:02000D24r ROM:02000E34 dword_2000E34 DCD 0x5000400 ; DATA XREF: ROM:02000D30r ROM:02000E38 dword_2000E38 DCD 0x400006C ; DATA XREF: ROM:02000D44r ROM:02000E3C dword_2000E3C DCD 0x400106C ; DATA XREF: ROM:02000D48r ROM:02000E40 dword_2000E40 DCD 0x4000214 ; DATA XREF: ROM:02000D58r ROM:02000E44 dword_2000E44 DCD 0x27FFE00 ; DATA XREF: ROM:02000D70r ROM:02000E48 dword_2000E48 DCD 0x27FFE28 ; DATA XREF: ROM:02000D7Cr ROM:02000E4C dword_2000E4C DCD 0x27FFE20 ; DATA XREF: ROM:02000D80r ROM:02000E50 dword_2000E50 DCD 0x27FFE38 ; DATA XREF: ROM:02000D94r ROM:02000E54 dword_2000E54 DCD 0x27FFE30 ; DATA XREF: ROM:02000D98r ROM:02000E58 dword_2000E58 DCD 0x4000C ; DATA XREF: ROM:02000DACr ROM:02000E5C dword_2000E5C DCD 0x4000188 ; DATA XREF: ROM:02000DB0r ROM:02000E60 dword_2000E60 DCD 0x4000184 ; DATA XREF: ROM:02000DB4r ROM:02000E64 dword_2000E64 DCD 0x4000180 ; DATA XREF: ROM:02000DD8r ROM:02000E64 ; ROM:02000DF8r